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Biography
Yu-Min Lee received the B.S. and M.S. degrees in communication engineering from the National Chiao-Tung University, Taiwan, in 1991 and 1993, respectively, and the Ph.D. degree in electrical and computer engineering from the University of Wisconsin-Madison in 2003. In 2003, he joined the Faculty of National Chiao Tung University, Hsinchu, Taiwan, where he currently holds a position as Associate Professor in the Department of Electrical and Computer Engineering. His research interests include computer-aided design on VLSI circuits with emphases on interconnect analysis and optimization, and circuit/thermal/electro-thermal simulation. Dr. Lee is a recipient of the ISPD Best Paper Award in 2003 and the ASP-DAC Best Papaer Award in 2013.
Personal Information:
o NYCU Academic Hub: https://scholar.nycu.edu.tw/zh/persons/yu-min-lee
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Experience, Honors and Awards
- Off-campus Honors 2013 Supervised postgraduate students 潘麒文 and 楊啟平 won the Honorable Mention Award in the 2013 domestic selection of the International Integrated Circuit.Computer-Aided Design (CAD) Software Development Marathon Competition
- Off-campus Honors 2013 ASPDAC 2013 Best Paper Award IEEE/ACM
- Off-campus Honors 2009 Supervised postgraduate students 黃培育、潘麒文 and 李亭蓉 received an Honorable Mention Award in the Nano-CMOS Device Category of the University Integrated Circuit Computer-Aided Simulation and Design Software Development Competition, organized by the National Nano Device Laboratory of the National Applied Research Laboratories.
- Internal honors 2008 Outstanding Instructor Award for the Academic Year 96, National Chiao Tung University
- Off-campus Honors 2007 Supervised postgraduate students吳佳鴻 and 李庚達 won the Honorable Mention Award in the Physical Design Category of the University Integrated Circuit Computer-Aided Design (CAD) Software Development Competition for the Academic Year 95, sponsored by the Ministry of Education.
- Off-campus Honors 2003 ISPD 2003 Best Paper Award IEEE/ACM/SIGDA
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Research Highlights
- Computer-aided VLSI design
- Circuit/thermal/electro-thermal analysis and simulation
- Interconnect analysis and optimization
- Design for manufacturing
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Journals
- Yu-Min Lee and Chia-Tung Ho, “InTraSim: Incremental transient simulation of power grids,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 36, no. 12, pp 2052~2065, December 2017.
- Yu-Min Lee, Kuan-Te Pan, and Chun Chen, “NaPer: A TSV noise-aware placer,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol.25, no. 5, pp. 1703~1713, May 2017.
- Pei-Yu Huang and Yu-Min Lee, "Full-chip thermal analysis for the early design stage via generalized integral transforms", IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 17, no. 5, pp. 613~626 , 2009., Dec. 2016
- Hong-Wen Chiou and Yu-Min Lee, “Thermal simulation for two-phase liquid cooling 3D-ICs,” Journal of Computer and Communications, vol. 4, no. 15, pp. 33~45, November 2016., Dec. 2016
- Yu-Min Lee, Chi-Wen Pan, Pei-Yu Huang, and Chi-Ping Yang, "LUTSim: A look-up table based thermal simulator for 3-D ICs," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 34, no. 8, pp. 1250~1263, August 2015.
- Pei-Yu Huang and Yu-Min Lee, “An efficient method for analyzing the on-chip thermal reliability with considering process variations,” ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 18, no. 2, article no. 41, July 2013.
- Ta-Sung Lee and Yu-min Lee, "Phase coherent blind equalization for high order QAM signals", Journal of the Chinese Institute of Electrical Engineering, vol.1, no.1, 1994.
- Yu-Min Lee and Charlie Chung-Ping Chen, "Power grid transient simulation in linear time based on transmission-line-modeling alternating-direction-implicit method", IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems (TCAD), vol. 21, no. 11, pp. 1343 -1352, 2002.
- Yu-Min Lee, Charlie Chung-Ping Chen, and D. F. Wong, "Optimal wire-sizing function under the Elmore Delay model with bounded wiresizes", IEEE Transactions on Circuits & Systems-I (TCAS-I) Vol. 49, No. 11, pp. 1671--1677, 2002.
- Yu-Min Lee, Charlie Chung-Ping Chen, Yao-Wen Chang, and D. F. Wong, "Simultaneous buffer-sizing and wire-sizing for clock trees based on Lagrangian relaxation", VLSI Design Journal, vol. 15, no. 3, pp. 587-594, 2002.
- Yu-Min Lee and Charlie Chung-Ping Chen, "The power grid transient simulation in linear time based on 3d alternating-direction-implicit method", IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems (TCAD), vol. 22, no. 11, pp. 1545-1550, 2003.
- Yu-Min Lee, Yahong Cao, Tsung-Hao Chen, Janet Wang, and Charlie Chung-Ping Chen, "HiPRIME: Hierarchical and passivity preserved interconnect macromodeling engine for RLKC power delivery", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 24, no. 6, pp. 797~806, 2005.
- Yu-Min Lee and Po-Yi Chiang, “Effective sleep transistor sizing algorithm for leakage power reduction,” International Journal of Electrical Engineering (IJEE), vol. 16, no. 5, pp. 421-431, October 2009.
- Yu-Min Lee and Chi-Wen Pan, “Redundant via insertion with wire spreading capability,” International Journal of Electrical Engineering (IJEE), vol. 17, no. 6, pp. 383-398, December 2010.
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Conference Papers
- Hong-Wen Chiou, Yu-Min Lee, Hsuan-Hsuan Hsiao, and Liang-Chia Cheng, “Thermal modeling and design on smartphones with heat pipe cooling technique,” in International Conference on Computer Aided Design (ICCAD), 2017., Nov. 2017
- Yu-Min Lee, Chi-Han Lee, and Yan-Cheng Zhu, “Yield-driven redundant power bump assignment for power network robustness,” in Asia South Pacific Design Automation Conference (ASPDAC), 2017., Jun. 2017
- Hong-Wen Chiou and Yu-Min Lee, “Thermal simulation for two-phase liquid cooling 3D-ICs,” in International Conference on Computer Simulation, Graphics and Aided Design (CSGAD), 2016., Dec. 2016
- JiaXing Song, Yu-Min Lee, Chia-Hung Ho, “ThermPL: Thermal-aware placement based on thermal contribution and locality,” in International Symposium on VLSI Design and Test (VLSI-DAT), 2016., Dec. 2015
- Yu-Min Lee, Chun Chen, JiaXing Song, and Kuan-Te Pan, “A TSV noise-aware 3-D placer,” in The Design, Automation, and Test in Europe Conference (DATE), 2015., Dec. 2015
- Chia-Tung Ho and Yu-Min Lee, “Efficient transient incremental analysis of on-chip power grid,” in Asia-Pacific Radio Science Conference (AP-RASC), 2013. (invited), Feb. 2015
- Chi-Wen Pan, Yu-Min Lee, Pei-Yu Huang, Chi-Ping Yang, Chang-Tzu Lin, Chia-Hsin Lee, Yung-Fa Chou, and Ding-Ming Kwai, "I-LUTSim: An iterative look-up table based thermal simulator for 3-D ICs," in Asia South Pacific Design Automation Conference (ASPDAC), 2013. (Best Paper Award), Feb. 2015
- Ting-Yuan Wang, Yu-Min Lee, and Charlie Chung-Ping Chen, "3D Thermal-ADI: an efficient chip-level transient thermal simulator", International Symposium on Physical Design (ISPD) 2003 (Best Paper Award)., Feb. 2015
- Shu-Han Wei, Yu-Min Lee, Chia-Hung Ho, Chih-Ting Sun, and Liang-Chia Cheng, “Power delivery network design for wiring and TSV resource minimization in TSV-based 3-D ICs,” in International Symposium on VLSI Design and Test (VLSI-DAT), 2013.
- Yu-Min Lee, Tsung-Heng Wy, Pei-Yu Huang, and Chi-Ping Yang, "NUMANA: A hybrid numerical and analytical thermal simulator for 3-D ICs," in The Design, Automation, and Test in Europe Conference (DATE), 2013.
- Yi-Hsuan Lee, Yu-Min Lee, Liang-Chia Cheng, and Yen-Tang Chang, "A robust incremental power grid analyzer by macromodeling approach and orthogonal matching pursuit," Asia Symposium on Quality Electronic Design (ASQED), 2012.
- Pei-Yu Huang, Yu-Min Lee, and Chi-Wen Pan “On-chip statistical hot-spot estimation using mixed-mesh statistical polynomial expressing generating and skew-normal based moment matching techniques,” in Asia South Pacific Design automation Conference (ASPDAC), 2012.
- Shu-Han Wei and Yu-Min Lee, “Supply voltage assignment for power reduction in 3D ICs considering thermal effect and level shifter budget,” in International Symposium on VLSI Design and Test (VLSI-DAT), 2011.
- Chi-Wen Pan and Yu-Min Lee, “Redundant via insertion under timing constraints,” in International Symposium on Quality Electronic Design (ISQED), 2011.
- Tsung-You Wu and Yu-Min Lee, “Fast Legalize: legalization with minimal disturbance for standard cell design,” in Proceedings of the 20th VLSI Design/CAD Symposium, 2009.
- Pei-Yu Huang, Jia-Hong Wu, Yu-Min Lee, and Huai-Chung Chang, “Stochastic thermal simulation considering with-in die process variations,” in Proceedings of the 19th VLSI Design/CAD Symposium, 2008.
- Shih-An Yu, Pei-Yu Huang, and Yu-Min Lee, “Power optimization in 3D ICs considering process variations and thermal effect,” in Proceedings of the 19th VLSI Design/CAD Symposium, 2008.
- Cheok-Kei Lei, Bo-Yi Chiang, and Yu-Min Lee, “An efficient redundant via insertion with wire pushing capability,” in Proceedings of the 19th VLSI Design/CAD Symposium, 2008.
- Pei-Yu Huang, Chih-Kang Lin, and Yu-Min Lee, “Full-chip thermal analysis via generalized integral transforms,” the 14th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI), 2007.
- Huan-Yu Chou and Yu-Min Lee, “An aggregation-based algebraic multigrid method with application to on-chip power network analysis” in Proceedings of the 16th VLSI Design/CAD Symposium, 2006.
- Simon Yi-Hung Chen, Zhe-Yu Lin, and Yu-Min Lee, “LPGC : A novel low power driven placement algorithm based on optimal gated clock topology” in Proceedings of the 16th VLSI Design/CAD Symposium, 2005.
- Yu-Min Lee and Charlie Chung-Ping Chen “Hierarchical model order reduction for signal-integrity driven interconnect synthesis”, Proceedings of the 11th Great Lakes Symposium on VLSI, pp. 109-114, 2001.
- Chia Tung Ho, Yu-Min Lee, Shu-Han Wei, and Liang-Chia Cheng, “Incremental transient simulation of power grid,”in International Symposium on Physical Design (ISPD), 2014.
- Huai-Chung Chang, Pei-Yu Huang, Ting-Jung Li, and Yu-Min Lee, “Statistical electro-thermal analysis with high compatibility of leakage power models,” International SoC Conference (SOCC) 2010
- Shu-Han Wei, Bing-Shiun Su, Yu-Min Lee, and Chi-Wen Pan, “Spatial correlation extraction with a limit amount measurement data,” in Asia Symposium on Quality Electronic Design (ASQED) 2010.
- Yu-Min Lee, Tsung-You Wu, and Po-Yi Chiang, “A hierarchical bin-based legalizer for standard-cell designs with minimal disturbance,” Asia South Pacific Design Automation Conference (ASPDAC) 2010.
- Jin-Tai Yan, Zhi-Wei Chen, Bo-Yi Chiang, and Yu-Min Lee, "Timing-constrained yield-driven redundant via insertion," in Asia Pacific Conference on Circuits and Systems (APCCAS) 2008.
- Cheok-Kei Lei, Po-Yi Chiang, and Yu-Min Lee, "Post-routing redundant via insertion with wire spreading capability," Asia South Pacific Design Automation Conference (ASPDAC) 2009.
- Shih-An Yu, Pei-Yu Huang, and Yu-Min Lee, "A multiple supply voltage based power reduction method in 3-D ICs considering process variations and thermal effects," Asia South Pacific Design Automation Conference (ASPDAC) 2009.
- Pei-Yu Huang, Jia-Hong Wu, and Yu-Min Lee, "Stochastic thermal simulation considering spatial correlated within-die process variations," Asia South Pacific Design Automation Conference (ASPDAC) 2009.
- Pei-Yu Huang, Chih-Kang Lin, and Yu-Min Lee, "Full-chip thermal analysis for the early design stage via generalized integral transforms," Asia South Pacific Design Automation Conference (ASPDAC) 2008.
- Yu-Min Lee and Charlie Chung-Ping Chen, "The power grid transient simulation in linear time based on 3D alternating-direction-implicit method", Progress In Electromagnetics Research Symposium (PIERS) 2003.
- Pei-Yu Huang, Chih-Kang Lin, and Yu-Min Lee, "Hierarchical power delivery network analysis using Markov chains," 2007 IEEE International SOC Conference, Hsin Chu, Taiwan, 2007, pp. 283-286, doi: 10.1109/SOCC.2007.4545475.
- Yu-Min Lee, Huan-Yu Chou, and Pei-Yu Huang, "An aggregation-based algebraic multigrid method for power grid analysis," 8th International Symposium on Quality Electronic Design (ISQED) 2007.
- Cheng-Hsuan Chiu, Yu-Chan Chang, Pei-Yu Huang, Chih-Hong Hwang, and Yu-Min Lee, "Crosstalk-driven slacement with considering on-chip mutual inductance and RLC noise", 13th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI) 2006.
- Yih-Lang Lin, Chih-Hong Hwang, and Yu-Min Lee, "Performance- and congestion-driven multilevel router," 13th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI) 2006.
- Pei-Yu Huang,Yu-Min Lee, Jeng-Liang Tsai, and Charlie Chung-Ping Chen, "Simultaneous area minimization and decaps insertion for power delivery network using adjoint sensitivity analysis with IEKS method," International Symposium on Circuits and Systems (ISCAS) 2006.
- Yu-Min Lee and Charlie Chung-Ping Chen, "Power grid transient simulation in linear time based on transmission-line-modeling alternating-direction-implicit method", International Conference on Computer Aided Design (ICCAD) 2001.
- Saisanthosh Balakrishnan, Jong Hyuk Park, Hyungsuk Kim, Yu-Min Lee, and Charlie Chung-Ping Chen, "Linear time hierarchical capacitance extraction without multiple expansion", International Conference on Computer Design (ICCD) 2001.
- Yu-Min Lee, Hing Yin Lai, and Charlie Chung-Ping Chen, "Optimal spacing and capacitance padding for general clock struct", Asia South Pacific Design Automation Conference (ASPDAC) 2001.
- Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, and Charlie Chung-Ping Chen, "HiPRIME: Hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery", Design Automation Conference (DAC) 2002.
- Yu-Min Lee and Charlie Chung-Ping Chen, "A hierarchical analysis methodology for chip-level power delivery with realizable model reduction", Asia South Pacific Design Automation Conference (ASPDAC) 2003.
- Yu-Min Lee and Charlie Chung-Ping Chen, "The power grid transient simulation in linear time based on 3D alternating-direction-implicit method", Design, Automation and Test in Europe (DATE) 2003.
